AI‘s tightest bottleneck: Memory chips

研报英文原文证据摘录

AI‘s tightest bottleneck: Memory chips

Our equity analysts forecast HBM demand to grow at a ~40% CAGR through 2030, versus a

~21% CAGR in demand for standard DRAM (the chips used for everyday consumer

computing and standard cloud databases).5 This is because hyperscalers will pay

premiums over automotive, consumer-electronics, and industrial buyers, and will sign

multi-year lock-ins to secure supply.

Figure 2: Standard DRAM demand grows at +21% CAGR Figure 3: HBM demand breakdown by major customers

through 2030, vs HBM at +40%

Source: Deutsche Bank equity analyst research. Source: Deutsche Bank Equity Team. For more, see here and here.

(ii) The supply side: Why fabs can’t follow

The inability of supply to meet outsized demand is compounded by the lead-time needed

to construct more fabs. Memory fabs (fabrication plants) are among the most expensive

and complex facilities to build, with a 2-3 years construction timeline. Most announced

projects will not contribute meaningfully to HBM capacity until 2027 at the earliest.

The complications of HBM production exacerbate the memory shortage crisis. HBM is

made from DRAM, but producing one additional bit of HBM requires around 3x more

silicon.6 That means every wafer directed to HBM consumes multiple wafers’ worth of

standard DRAM/NAND capacity needed for end-markets like automotives and PCs –

creating shortage risk across not just the AI segment but all memory types. As this ratio

moves from 3x to 4x silicon needed with HBM4/HBM4e, the crowding-out effect will

worsen. For example, facilities and tools that would have served conventional memory are

being redirected to HBM; “clean room space” – the ultra-sterile environments where

wafers are processed – is at its limits, forcing manufacturers to choose what to build on