Harlan’s AVGO Defense (and call at 11); HPE; HPQ: US Hardware / Semiconductors Sector Specialist Commentary

研报英文原文证据摘录

Harlan’s AVGO Defense (and call at 11); HPE; HPQ: US Hardware / Semiconductors Sector Specialist Commentary

Joshua Meyers - Specialist Sales - US TMT AC (1-617) 310 0767 North America Specialist Sales J P M O R G A N

joshua.meyers@jpmorgan.com [RESEND] JPM: Chips for Breakfast

J.P. Morgan Securities LLC - Harlan's AVGO Defense (and call

at 11); HPE; HPQ

17 June 2026

AVGO: Harlan is Defending – Ignore Mediatek Noise, TPU v9 2nm on Track, and 4 TPU Generations Are Secured. Here

Harlan’s checks and high-level discussions with the company buoy his confidence to look through Asia supply chain noise

and double-down on AVGO amidst recent weakness.The current generation TPU v8i 3nm “Sunfish” was fully qualified mid-

C25 and is ramping, while the much-touted Mediatek v8t “Zebrafish” (with only single compute die and 6 HBM stacks) is still

being re-spun/optimized; this implies an 18+ month AVGO lead over GOOGL’s COT team. More importantly, GOOGL has not

cancelled its next-gen TPU v9 2nm (4 compute die, 16 HBM stack, 400GPS SerDes); it remains on-track for C28 with no

delays, no cancellations; the team started IP design for this critical chip in 1HC25, and the SOC design in 2H. Though it makes

sense to diversify, Harlan underscores that GOOGL’s COT strategy will take years to close the advanced chip and packaging

design/IP gap with AVGO; this explains the 5-year GOOGL/AVGO TPU agreement through TPU v11, which includes

commitments to increase TPU revenues on an annual basis through 2031. The portfolio will be further differentiated from C28

when AVGO brings on its advanced substrate facility in Singapore in August. Meanwhile, AVGO has the largest ASIC XPU

design win pipeline in the world, with ASIC XPU programs at 6 global frontier model builders (GOOGL, Anthropic, OAI, META