ReportGem ReportGem 中文

GLOBAL RESEARCH ARCHIVE

China Semis Supply Chain: Huawei Tau (τ) Scaling Law – benefiting adv. packaging, SPE, and memory

Published: 2026-05-26Institution: BofA Global ResearchPages: 5Original language: 英语Evidence page: 3

Research evidence excerpt

China Semis Supply Chain: Huawei Tau (τ) Scaling Law – benefiting adv. packaging, SPE, and memory

estment of

High-performance computing packaging and testing industrialization

Tongfu Micro 002156 CH CNY980.26mn. Upon completion, adds annual capacity of 321.6m units,

project

including 300mn FCCSP and 21.6mn FCBGA.

Total investment of CNY1.2bn, including CNY1.1bn for plant and equipment.

Huatian Technology 002185 CH MCM (MCP) multi-chip packaging expansion project

Upon completion, annual capacity will reach 1.8bn units.

Total investment of CNY1.2bn, including CNY1.1bn for equipment. Upon

High-density SiP packaging and testing expansion project

completion, annual capacity will reach 1.5bn units.

Total investment of CNY1.3bn. Upon completion, annual capacity will reach

TSV and FC packaging and testing industrialization project

480k wafers and 600m FC units.

Total investment of CNY1.5bn, including CNY1.46bn for equipment. Upon

Memory and RF packaging and testing industrialization project

completion, annual capacity will reach 1.3bn BGA/LGA units.

Source: Companies

BofA GLOBAL RESEARCH

Exhibit 5: Abbreviations

Abbreviations

Abbr. Full name Abbr. Full name

CMP Chemical Mechanical Polishing OSAT Outsourced Semiconductor Assembly and Testing

DRAM Dynamic Random-Access Memory PCIe Peripheral Component Interconnect Express

ECP Extended Calculus Patterns PVD Physical Vapor Deposition

GAA Gate-All-Around RC Parasitic Resistance and Capacitance

HBM High Bandwidth Memory RDL ReDistribution Layer

IC Integrated Circuit SoC System on Chip

IEEE Institute of Electrical and Electronics Engineers SPE Semiconductor Production Equipment

IP Intellectual property SRAM Static Random-Access Memory

MTr million transistors TCP Transmission Control Protocol

NAND Not AND TSV Through-Silicon Via

The English excerpt is extracted automatically from the cited source page and may contain layout or recognition errors. It is never batch translated.

Open report viewer